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Detailed Look at Intel's Core Architecture
Posted by News-Bot on March 09th 2006

The ALU units were enhanced for this macro-fusion but are stillsingle dispatch and single cycle execution based. The ALUs can then performthe combined micro-op that actually represents two x86 instructions in asingle pass. The Core Architecture reads five instructions from theinstruction queue and if it finds a fuseable pair, they are combined andconverted to one micro-op. This means for that 5th instruction you get itdone one cycle earlier than you would have without the fusion process.

View article at pcper.com

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